Design of aTwo-stage Low Noise Amplifier

This project is a presentation of the design and simulation of a two stage low noise amplifier (LNA) operating at 16GHz by using the transistor NE3210S01. The design circuit uses lumped elements to implement with input, output, intermediate matching networks and the main purpose of using 2stages is to achieve good gain. Input and output matching network are used to produce 50Ω impedance for maximum power transfer. The target of our design is to achieve a gain greater than 20dB (20dB) and a noise figure (F) lower than 2dB (2dB). As a result a two-stage LNA has been successfully designed with 21.5 dB gain and a 0.62 dB noise figure.