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dc.contributor.advisor Roosta, Ramin en_US Pandya, Parth 2018-02-13T17:43:16Z 2018-02-13T17:43:16Z 2018 en_US 2018-02-13
dc.identifier.uri en
dc.description Includes bibliographical references (pages 52-52) en_US
dc.description.abstract Very Large Scale Integration (VLSI) Design is an important and complex area of Electrical and Computer Engineering field. It uses many Computer Aided Design (CAD) tools. There are three parts of CAD tools: Design management, Verification, and Synthesis. Application Specific Integrated Circuit (ASIC) design uses many of the Electronic Design Automation (EDA) tools for Designing, testing, and verification. Advanced Electronic Design Automation (EDA) tools like TetraMAX, Design Compiler, PrimeTime, and IC Compiler from Synopsys are necessary tools in today’s complex IC-chip design. The main aim of this project is to design and test a digital ASIC using these advanced design tools. The project also provides a brief knowledge of ASIC design flow (Front-end and Back-end), Design Compiler, Synopsys DFT compiler, Synopsys TetraMAX, and Synopsys PrimeTime. A design example has been implemented to demonstrate a complete top-down design flow for this process. By using these tools, designers can optimize power, area, and timing for the final chip fabrication.
dc.description.statementofresponsibility by Parth Pandya en_US
dc.format.extent ix, 61 pages en_US
dc.language.iso en_US en_US
dc.publisher California State University, Northridge en_US
dc.rights.uri en_US
dc.subject Application Specific Integrated Circuit (ASIC) design flow
dc.subject Electronic Design Automation(EDA) tools
dc.subject Automatic Test Pattern Generation(ATPG)
dc.subject Design for Testability
dc.subject Low power ASIC
dc.subject Static Timing Analysis
dc.subject Backend design
dc.subject PrimeTime
dc.subject TetraMAX
dc.subject Design compiler
dc.subject.other Dissertations, Academic -- CSUN -- Engineering -- Electrical and Computer Engineering. en_US
dc.title Backend design and testability of a digital ASIC
dc.type Thesis en_US 2018-02-13T17:43:16Z
dc.contributor.department California State University, Northridge. Department of Elec & Comp Engr en_US M.S. en_US
dc.contributor.committeeMember Mirzaei, Shahnam en_US
dc.contributor.committeeMember Tabibzadeh, Maryam en_US
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